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Field Programmable Gate Array (FPGA) Principal Engineer Job ID: COS-FPGA-2 City/State: Colorado Springs, CO (Relocation Available) Type and Schedule: Full-Time Annualized Salary Range: $163,000 - $198,000 depending on experience. Position Description: Caliola's FPGA Engineers support the team by researching, designing, and implementing FPGA solutions across multiple projects. Your work will be used to deploy next generation HF communication waveforms. As an FPGA Engineer, you will be involved in the design, development, and verification of complex signal processing algorithms. You will work closely with cross-disciplinary teams of software and hardware engineers to solve important problems. A solid design philosophy, a commitment to maintaining good tests, and an excellent work ethic are required to be successful in this position. Essential Responsibilities: Design and test digital signal processing systems for FPGAs (large and small). Develop and maintain unit tests. Translate software (e.g., Matlab, Simulink, C, C++, Python) into design requirements that can be implemented and tested in HDL. Architect functional performance tests using tools like oscilloscopes, logic analyzers, spectrum analyzers, etc. Script FPGA builds for use in Continuous Integration (CI) pipelines. Work cross-functionally with all engineering development and firmware/software related groups. Provide regular progress updates to other team members and leadership. Prepare technical documentation, including design requirements, specifications, test reports, and user manuals. Occasional travel for customer visits and system testing. Other duties as assigned. What We Require: Minimum Skills & Requirements BS in Electrical Engineering or related discipline. 6+ year of experience using HDL to develop custom logic for FPGA design. Experience developing chip level designs for FPGAs in VHDL, Verilog or SystemVerilog. Experience in digital logic design including timing closure for high-speed designs. Experience troubleshooting designs in the lab on hardware. Experience reading schematics, datasheets, and other technical information and the ability to apply the information to the design process. Experience with AMD/Xilinx Vivado, Intel/Altera Quartus, or other comparable FPGA development toolchains. Experience simulating and verifying large HDL projects using tools like AMD/Xilinx Vivado, Questa, Active HDL, Riviera Pro, or an equivalent toolchain. Excel in individual and collaborative work assignments, have excellent communication, be resourceful and creative, and willing to contribute to a multidisciplinary and fast-paced engineering environment. This position requires the ability to obtain and maintain a security clearance issued by the US Government. Security clearances may only be granted to US citizens. Demonstrated Qualifications/Skillsets Proven track record of designing new types of systems that are on the forefront of technology, design and applications. Experience with several bus types including SPI, I2C, I2S, USB, PCIe, AXI streaming, AXI, Wishbone, etc. Experience designing FPGAs to customize System-on-Chip (SoC) systems including interfacing with software (interrupt controllers, DMA controllers, et Experience with clock domain crossing, timing constraints, pin assignment, placement, and layout constraints, etc. Excellent collaboration and working across organization skills to achieve top performance results. What We Value: M.S. or PhD in Electrical Engineering or related discipline. Digital system design experience in FPGAs or ASICs. Kernel driver development and/or other low level programming skills. Fluency in Python, TCL, C, and C++. Experience designing and maintaining embedded systems requiring reliable real-time operation. Solid foundation of engineering skills and knowledge, including how engineering projects progress from initial to planning to final completion and use b the customer. Experience with AMD/Xilinx chip scope ILA or Intel/Altera signaltap. Understand trade-offs between area, speed, and development time. Effectively manage schedules and priorities with minimal direction to meet short and long-term schedule/deliverables. Self-starter and a problem solver; must have the ability to see the big picture and implement changes as required. Knowledge of the Linux Kernel or other low level operating system programming. Dedication to maintaining a well-tested codebase. A deep understanding of digital signal processing algorithms and implementation trade-offs. A thirst for knowledge and a willingness to learn and teach others.